A Digital LDO in 22-nm CMOS With a 4-b Self-Triggered Binary Search Windowed Flash ADC Featuring Analog Layout Generator Framework

Post time 2024-4-19 17:48:56

journal：IEEE Solid-State Circuits Letters

Authors：Xiaosen Liu; Soner Yaldiz; Parijat Mukherjee; Steven Burns; Harish Krishnamurthy; Krishnan Ravichandran; Zakir Ahmed; Nachiket Desai; Nicolas Butzen; James Tschanz; Vivek De

Published date：2023--

DOI：10.1109/lssc.2023.3265956

PDF link：https://ieeexplore.ieee.org/stampPDF/getPDF.jsp?arnumber=10097870

Article link：http://dx.doi.org/10.1109/lssc.2023.3265956

Article Source：Institute of Electrical and Electronics Engineers (IEEE)。

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Post time 2024-4-19 17:48:57

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Post time 2024-4-22 19:58:41

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[IEEE] A Digital LDO in 22-nm CMOS With a 4-b Self-Triggered Binary Search Windowed Flash ADC Featuring Analog Layout Generator Framework

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